1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to circuit boards with vias and to methods of making the same.
2. Description of the Related Art
Circuit boards of various types, including semiconductor chip package substrates and circuit cards, utilize conductor lines or traces to convey signals, power and ground from one point to another. Many conventional circuit board designs use multiple interconnect layers or levels. One layer is electrically linked to the next by way of conducting vias. The vias themselves are frequently formed on so-called via lands, which are shaped pads of conducting material. Many conventional circuit board vias typically have a circular footprint. One type of conventional via pad has a circular footprint and another type uses a rectangular footprint.
There is an on-going trend to squeeze more routing into circuit boards, particularly semiconductor chip package substrates. The need for greater routing complexity is caused by, among other things, increases in the number of input/outputs of ever more complex semiconductor die designs. It is not a trivial matter to insert more traces and vias into a circuit board layout. Indeed, the goal of increased routing must compete with design rules, which are put in place to ensure that manufacturing processes used to form the circuit board can do so reliably.
Conventional via and via lands are often vertically aligned from one interconnect layer to the next. Thus, one conventional mode for increasing packing density of routing traces involves shrinking both vias and lands. However, any attempt to shrink a via size to accommodate additional trace routing needs to account for attendant increase in current densities in the via. If current densities exceed threshold levels, device failure can occur. Many conventional designs try to avoid the issue by essentially over designing the via hole laser drilling process. Holes are laser drilled with generous sizes. However, the large via hole sizes tend to prevent the placement of traces adjacent the vias in order to satisfy design rules.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.